V command translation error Clarification

classic Classic list List threaded Threaded
14 messages Options
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

V command translation error Clarification

Hercules390 - General mailing list
Hi

 

I recently tried to display my TCB PSATOLD and got a translation error I
assume e.g. V 8B4EB8 by itself default to the home address space but what is
the home address space do I first start CPU XX but what is the home address
space

For that CPU  

 

Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
On Sat, 11 Feb 2017 19:41:57 -0500 "'Joe Reichman' [hidden email]
[hercules-390]" <[hidden email]> wrote:

:>I recently tried to display my TCB PSATOLD and got a translation error I
:>assume e.g. V 8B4EB8 by itself default to the home address space but what is
:>the home address space do I first start CPU XX but what is the home address
:>space

Don't know enough Herc, but assuming similar to VM - unless you placed the
machine in  a stop when your TCB was in control the odds are that some other
address space will be in control. Also, simple V probably goes to the primary
address space rather than the home address space.

VM has an ASN qualifier to allow the qualification to a specific address
space, i.e.,

            D    ASN34.5000

would display location X'5000' in address space x'34'. I would presume that
Herc has a similar construct.

--
Binyamin Dissen <[hidden email]>
http://www.dissensoftware.com

Should you use the mailblocks package and expect a response from me,
you should preauthorize the dissensoftware.com domain.

I very rarely bother responding to challenge/response systems,
especially those from irresponsible companies.
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

RE: V command translation error Clarification

Hercules390 - General mailing list
Binyamin Dissen wrote:

[...]
> VM has an ASN qualifier to allow the qualification to a
> specific address space, i.e.,
>
>    D ASN34.5000
>
> would display location X'5000' in address space x'34'. I would
> presume that Herc has a similar construct.

Unfortunately, Hercules's "v" command only supports specification of Primary, Secondary or Home space translation mode, but unfortunately NOT any ability to specify a specific ASN (Address Space Number):


HHC01603I help v
HHC01603I
HHC01602I Command               Description
HHC01602I ----------------      -------------------------------------------------------
HHC01602I v                    *Display or alter virtual storage
HHC01603I
HHC01603I Format: "v [P|S|H]addr[.len]" or "v [P|S|H]addr[-addr2]" to display
HHC01603I up to 64K of virtual storage, or "v [P|S|H]addr=value" to alter up to
HHC01603I 32 bytes of virtual storage, where 'value' is a string of up to 32
HHC01603I pairs of hex digits. The optional P, S or H address prefix character
HHC01603I forces Primary, Secondary or Home Space address translation mode
HHC01603I instead of using the current PSW mode, which is the default.
HHC01603I


--
"Fish" (David B. Trout)
Software Development Laboratories
http://www.softdevlabs.com
mail: [hidden email]




Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
I think V by itself defaults to HOME albeit
There is no way of knowing which home address

I wonder if it depends on specifying a CPU which
Has a PSAAOLD



> On Feb 12, 2017, at 4:28 AM, ''Fish' (David B. Trout)' [hidden email] [hercules-390] <[hidden email]> wrote:
>
> Binyamin Dissen wrote:
>
> [...]
> > VM has an ASN qualifier to allow the qualification to a
> > specific address space, i.e.,
> >
> > D ASN34.5000
> >
> > would display location X'5000' in address space x'34'. I would
> > presume that Herc has a similar construct.
>
> Unfortunately, Hercules's "v" command only supports specification of Primary, Secondary or Home space translation mode, but unfortunately NOT any ability to specify a specific ASN (Address Space Number):
>
> HHC01603I help v
> HHC01603I
> HHC01602I Command Description
> HHC01602I ---------------- -------------------------------------------------------
> HHC01602I v *Display or alter virtual storage
> HHC01603I
> HHC01603I Format: "v [P|S|H]addr[.len]" or "v [P|S|H]addr[-addr2]" to display
> HHC01603I up to 64K of virtual storage, or "v [P|S|H]addr=value" to alter up to
> HHC01603I 32 bytes of virtual storage, where 'value' is a string of up to 32
> HHC01603I pairs of hex digits. The optional P, S or H address prefix character
> HHC01603I forces Primary, Secondary or Home Space address translation mode
> HHC01603I instead of using the current PSW mode, which is the default.
> HHC01603I
>
> --
> "Fish" (David B. Trout)
> Software Development Laboratories
> http://www.softdevlabs.com
> mail: [hidden email]
>
>
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
In reply to this post by Hercules390 - General mailing list
On 12 February 2017 at 04:28, ''Fish' (David B. Trout)'
[hidden email] wrote:

> HHC01603I help v
> HHC01603I
> HHC01602I Command               Description
> HHC01602I ----------------      -------------------------------------------------------
> HHC01602I v                    *Display or alter virtual storage
> HHC01603I
> HHC01603I Format: "v [P|S|H]addr[.len]" or "v [P|S|H]addr[-addr2]" to display
> HHC01603I up to 64K of virtual storage, or "v [P|S|H]addr=value" to alter up to
> HHC01603I 32 bytes of virtual storage, where 'value' is a string of up to 32
> HHC01603I pairs of hex digits. The optional P, S or H address prefix character
> HHC01603I forces Primary, Secondary or Home Space address translation mode
> HHC01603I instead of using the current PSW mode, which is the default.

So if the default is the current PSW mode, what does it do if that
mode is AR? How does it choose an access register to use?

Tony H.
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
I haven't tried this

But me thinks it looks the corrent  CPU set with the CPU command and each CPU had is own PSA
And it's own PSAAOLD



> On Feb 12, 2017, at 3:16 PM, Tony Harminc [hidden email] [hercules-390] <[hidden email]> wrote:
>
> On 12 February 2017 at 04:28, ''Fish' (David B. Trout)'
> [hidden email] wrote:
> > HHC01603I help v
> > HHC01603I
> > HHC01602I Command Description
> > HHC01602I ---------------- -------------------------------------------------------
> > HHC01602I v *Display or alter virtual storage
> > HHC01603I
> > HHC01603I Format: "v [P|S|H]addr[.len]" or "v [P|S|H]addr[-addr2]" to display
> > HHC01603I up to 64K of virtual storage, or "v [P|S|H]addr=value" to alter up to
> > HHC01603I 32 bytes of virtual storage, where 'value' is a string of up to 32
> > HHC01603I pairs of hex digits. The optional P, S or H address prefix character
> > HHC01603I forces Primary, Secondary or Home Space address translation mode
> > HHC01603I instead of using the current PSW mode, which is the default.
>
> So if the default is the current PSW mode, what does it do if that
> mode is AR? How does it choose an access register to use?
>
> Tony H.
>
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list


On 2/13/2017 1:44 AM, Joseph Reichman [hidden email]
[hercules-390] wrote:
> > > I haven't tried this > > But me thinks it looks the corrent  CPU
set with the CPU command and > each CPU had is own PSA And it's own
PSAAOLD >
I don't think that was the question.

The question is that if you have a PSW with AR mode enabled, how do you
specify which Access Register to use for translation ? An instruction
would use the same AR as the base register. For example : in AR mode, "L
1,0(2)" will use GPR2 to construct the logical address, and then use AR2
for translation.

I think the question is : when using the "v" panel command, how does one
specify which AR to use when the PSW is in AR mode ?

--Ivan


[Non-text portions of this message have been removed]

Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
I think if you don't specify anything it's AR0

A value of zero is home

In AR mode instead of a valid alert a value 0 is home 1 primary 2 secondary


I think that's what the code does v with out anything in AR mode is a AR of 0

> On Feb 12, 2017, at 8:06 PM, Ivan Warren [hidden email] [hercules-390] <[hidden email]> wrote:
>
>
>
> On 2/13/2017 1:44 AM, Joseph Reichman [hidden email]
> [hercules-390] wrote:
> > > > I haven't tried this > > But me thinks it looks the corrent CPU
> set with the CPU command and > each CPU had is own PSA And it's own
> PSAAOLD >
> I don't think that was the question.
>
> The question is that if you have a PSW with AR mode enabled, how do you
> specify which Access Register to use for translation ? An instruction
> would use the same AR as the base register. For example : in AR mode, "L
> 1,0(2)" will use GPR2 to construct the logical address, and then use AR2
> for translation.
>
> I think the question is : when using the "v" panel command, how does one
> specify which AR to use when the PSW is in AR mode ?
>
> --Ivan
>
> [Non-text portions of this message have been removed]
>
>
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
On Sun, 12 Feb 2017 20:50:05 -0500 "Joseph Reichman [hidden email]
[hercules-390]" <[hidden email]> wrote:

:>I think if you don't specify anything it's AR0

:>A value of zero is home

No, a value of zero is primary.

:>In AR mode instead of a valid alert a value 0 is home 1 primary 2 secondary

Alet 0 = primry, Alet 1 = secondary (hardware), Alet 2 = home (DUAL)

:>I think that's what the code does v with out anything in AR mode is a AR of 0
:>
:>> On Feb 12, 2017, at 8:06 PM, Ivan Warren [hidden email] [hercules-390] <[hidden email]> wrote:
:>>
:>>
:>>
:>> On 2/13/2017 1:44 AM, Joseph Reichman [hidden email]
:>> [hercules-390] wrote:
:>> > > > I haven't tried this > > But me thinks it looks the corrent CPU
:>> set with the CPU command and > each CPU had is own PSA And it's own
:>> PSAAOLD >
:>> I don't think that was the question.
:>>
:>> The question is that if you have a PSW with AR mode enabled, how do you
:>> specify which Access Register to use for translation ? An instruction
:>> would use the same AR as the base register. For example : in AR mode, "L
:>> 1,0(2)" will use GPR2 to construct the logical address, and then use AR2
:>> for translation.
:>>
:>> I think the question is : when using the "v" panel command, how does one
:>> specify which AR to use when the PSW is in AR mode ?
:>>
:>> --Ivan
:>>
:>> [Non-text portions of this message have been removed]
:>>
:>>

--
Binyamin Dissen <[hidden email]>
http://www.dissensoftware.com

Should you use the mailblocks package and expect a response from me,
you should preauthorize the dissensoftware.com domain.

I very rarely bother responding to challenge/response systems,
especially those from irresponsible companies.
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list


On 2/13/2017 8:01 AM, Binyamin Dissen [hidden email]
[hercules-390] wrote:

> On Sun, 12 Feb 2017 20:50:05 -0500 "Joseph Reichman [hidden email]
> [hercules-390]" <[hidden email]> wrote:
>
> :>I think if you don't specify anything it's AR0
>
> :>A value of zero is home
>
> No, a value of zero is primary.
>
> :>In AR mode instead of a valid alert a value 0 is home 1 primary 2 secondary
>
> Alet 0 = primry, Alet 1 = secondary (hardware), Alet 2 = home (DUAL)
>
>
When DAT is on, the address space is controlled by bits 16 and 17 of the
PSW :

- 00 : Primary
- 01 : Access Register Mode
- 10 : Secondary
- 11 : Home

AR-Specified Virtual Address
An AR-specified virtual address is a virtual address
which is to be translated by means of an access-register-
specified address-space-control element. Logical
addresses are treated as AR-specified addresses
when in the access-register mode.

--Ivan



[Non-text portions of this message have been removed]

Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
In reply to this post by Hercules390 - General mailing list
On 13 February 2017 at 02:01, Binyamin Dissen [hidden email] wrote:
> Alet 0 = primry, Alet 1 = secondary (hardware), Alet 2 = home (DUAL)

Right. Just to emphasise your point, the magic ALET values 0 and 1 are
hardware-defined, but the value 2 is implemented entirely in software
by z/OS, and works exactly like any other ALET value. Other operating
systems may or may not implement this shortcut.

Back to the issue of the Hercules V command, there is no answer but to
look at the code. Clearly there is room for improvement/enhancement.

Tony H.
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
The op needs to give some information. I think the op has a very basic problem and AR mode is not part of their skill set. AR mode is confusing even if you have some AR experience. E.g. AR's being confused with alet's. AR's are associated to each register. AR0 is always assumed to be ALET 0. The V command does not reference AR's (only the first 3 ALET's). 
The op mentioned "starting a CPU" and their TCB. The CPU must be stopped otherwise it will be a changing target. Second, we have no clue how they found this TCB.

You can use use STARTALL and STOPALL until you find your TCB active on a CPU (or use breakpoint).Use the CPU xx command to select that CPU. If you are not in an AR mode, then the V command should work.

Alternatively, you could set an MVS PER SLIP ACTION=WAIT to stop the system when the condition is met. Find the CPU with your TCB. Use CPU xx and then the V command.
Good luck.  

 On Monday, February 13, 2017 8:10 AM, "Tony Harminc [hidden email] [hercules-390]" <[hidden email]> wrote:
 

     On 13 February 2017 at 02:01, Binyamin Dissen [hidden email] wrote:
> Alet 0 = primry, Alet 1 = secondary (hardware), Alet 2 = home (DUAL)

Right. Just to emphasise your point, the magic ALET values 0 and 1 are
hardware-defined, but the value 2 is implemented entirely in software
by z/OS, and works exactly like any other ALET value. Other operating
systems may or may not implement this shortcut.

Back to the issue of the Hercules V command, there is no answer but to
look at the code. Clearly there is room for improvement/enhancement.

Tony H.
  #yiv5108373949 -- #yiv5108373949ygrp-mkp {border:1px solid #d8d8d8;font-family:Arial;margin:10px 0;padding:0 10px;}#yiv5108373949 #yiv5108373949ygrp-mkp hr {border:1px solid #d8d8d8;}#yiv5108373949 #yiv5108373949ygrp-mkp #yiv5108373949hd {color:#628c2a;font-size:85%;font-weight:700;line-height:122%;margin:10px 0;}#yiv5108373949 #yiv5108373949ygrp-mkp #yiv5108373949ads {margin-bottom:10px;}#yiv5108373949 #yiv5108373949ygrp-mkp .yiv5108373949ad {padding:0 0;}#yiv5108373949 #yiv5108373949ygrp-mkp .yiv5108373949ad p {margin:0;}#yiv5108373949 #yiv5108373949ygrp-mkp .yiv5108373949ad a {color:#0000ff;text-decoration:none;}#yiv5108373949 #yiv5108373949ygrp-sponsor #yiv5108373949ygrp-lc {font-family:Arial;}#yiv5108373949 #yiv5108373949ygrp-sponsor #yiv5108373949ygrp-lc #yiv5108373949hd {margin:10px 0px;font-weight:700;font-size:78%;line-height:122%;}#yiv5108373949 #yiv5108373949ygrp-sponsor #yiv5108373949ygrp-lc .yiv5108373949ad {margin-bottom:10px;padding:0 0;}#yiv5108373949 #yiv5108373949actions {font-family:Verdana;font-size:11px;padding:10px 0;}#yiv5108373949 #yiv5108373949activity {background-color:#e0ecee;float:left;font-family:Verdana;font-size:10px;padding:10px;}#yiv5108373949 #yiv5108373949activity span {font-weight:700;}#yiv5108373949 #yiv5108373949activity span:first-child {text-transform:uppercase;}#yiv5108373949 #yiv5108373949activity span a {color:#5085b6;text-decoration:none;}#yiv5108373949 #yiv5108373949activity span span {color:#ff7900;}#yiv5108373949 #yiv5108373949activity span .yiv5108373949underline {text-decoration:underline;}#yiv5108373949 .yiv5108373949attach {clear:both;display:table;font-family:Arial;font-size:12px;padding:10px 0;width:400px;}#yiv5108373949 .yiv5108373949attach div a {text-decoration:none;}#yiv5108373949 .yiv5108373949attach img {border:none;padding-right:5px;}#yiv5108373949 .yiv5108373949attach label {display:block;margin-bottom:5px;}#yiv5108373949 .yiv5108373949attach label a {text-decoration:none;}#yiv5108373949 blockquote {margin:0 0 0 4px;}#yiv5108373949 .yiv5108373949bold {font-family:Arial;font-size:13px;font-weight:700;}#yiv5108373949 .yiv5108373949bold a {text-decoration:none;}#yiv5108373949 dd.yiv5108373949last p a {font-family:Verdana;font-weight:700;}#yiv5108373949 dd.yiv5108373949last p span {margin-right:10px;font-family:Verdana;font-weight:700;}#yiv5108373949 dd.yiv5108373949last p span.yiv5108373949yshortcuts {margin-right:0;}#yiv5108373949 div.yiv5108373949attach-table div div a {text-decoration:none;}#yiv5108373949 div.yiv5108373949attach-table {width:400px;}#yiv5108373949 div.yiv5108373949file-title a, #yiv5108373949 div.yiv5108373949file-title a:active, #yiv5108373949 div.yiv5108373949file-title a:hover, #yiv5108373949 div.yiv5108373949file-title a:visited {text-decoration:none;}#yiv5108373949 div.yiv5108373949photo-title a, #yiv5108373949 div.yiv5108373949photo-title a:active, #yiv5108373949 div.yiv5108373949photo-title a:hover, #yiv5108373949 div.yiv5108373949photo-title a:visited {text-decoration:none;}#yiv5108373949 div#yiv5108373949ygrp-mlmsg #yiv5108373949ygrp-msg p a span.yiv5108373949yshortcuts {font-family:Verdana;font-size:10px;font-weight:normal;}#yiv5108373949 .yiv5108373949green {color:#628c2a;}#yiv5108373949 .yiv5108373949MsoNormal {margin:0 0 0 0;}#yiv5108373949 o {font-size:0;}#yiv5108373949 #yiv5108373949photos div {float:left;width:72px;}#yiv5108373949 #yiv5108373949photos div div {border:1px solid #666666;height:62px;overflow:hidden;width:62px;}#yiv5108373949 #yiv5108373949photos div label {color:#666666;font-size:10px;overflow:hidden;text-align:center;white-space:nowrap;width:64px;}#yiv5108373949  #yiv5108373949reco-category {font-size:77%;}#yiv5108373949 #yiv5108373949reco-desc {font-size:77%;}#yiv5108373949 .yiv5108373949replbq {margin:4px;}#yiv5108373949 #yiv5108373949ygrp-actbar div a:first-child {margin-right:2px;padding-right:5px;}#yiv5108373949 #yiv5108373949ygrp-mlmsg {font-size:13px;font-family:Arial, helvetica, clean, sans-serif;}#yiv5108373949 #yiv5108373949ygrp-mlmsg table {font-size:inherit;font:100%;}#yiv5108373949 #yiv5108373949ygrp-mlmsg select, #yiv5108373949 input, #yiv5108373949 textarea {font:99% Arial, Helvetica, clean, sans-serif;}#yiv5108373949 #yiv5108373949ygrp-mlmsg pre, #yiv5108373949 code {font:115% monospace;}#yiv5108373949 #yiv5108373949ygrp-mlmsg * {line-height:1.22em;}#yiv5108373949 #yiv5108373949ygrp-mlmsg #yiv5108373949logo {padding-bottom:10px;}#yiv5108373949 #yiv5108373949ygrp-msg p a {font-family:Verdana;}#yiv5108373949 #yiv5108373949ygrp-msg p#yiv5108373949attach-count span {color:#1E66AE;font-weight:700;}#yiv5108373949 #yiv5108373949ygrp-reco #yiv5108373949reco-head {color:#ff7900;font-weight:700;}#yiv5108373949 #yiv5108373949ygrp-reco {margin-bottom:20px;padding:0px;}#yiv5108373949 #yiv5108373949ygrp-sponsor #yiv5108373949ov li a {font-size:130%;text-decoration:none;}#yiv5108373949 #yiv5108373949ygrp-sponsor #yiv5108373949ov li {font-size:77%;list-style-type:square;padding:6px 0;}#yiv5108373949 #yiv5108373949ygrp-sponsor #yiv5108373949ov ul {margin:0;padding:0 0 0 8px;}#yiv5108373949 #yiv5108373949ygrp-text {font-family:Georgia;}#yiv5108373949 #yiv5108373949ygrp-text p {margin:0 0 1em 0;}#yiv5108373949 #yiv5108373949ygrp-text tt {font-size:120%;}#yiv5108373949 #yiv5108373949ygrp-vital ul li:last-child {border-right:none !important;}#yiv5108373949

   
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
Tony thanks I now understand

The problem "The CPU must me stopped"

Or else the target changes I got it

I understand why it's not working



> On Feb 13, 2017, at 6:27 PM, Jon Perryman [hidden email] [hercules-390] <[hidden email]> wrote:
>
> The op needs to give some information. I think the op has a very basic problem and AR mode is not part of their skill set. AR mode is confusing even if you have some AR experience. E.g. AR's being confused with alet's. AR's are associated to each register. AR0 is always assumed to be ALET 0. The V command does not reference AR's (only the first 3 ALET's).
>
> The op mentioned "starting a CPU" and their TCB. The CPU must be stopped otherwise it will be a changing target. Second, we have no clue how they found this TCB.
>
>
> You can use use STARTALL and STOPALL until you find your TCB active on a CPU (or use breakpoint).Use the CPU xx command to select that CPU. If you are not in an AR mode, then the V command should work.
>
>
> Alternatively, you could set an MVS PER SLIP ACTION=WAIT to stop the system when the condition is met. Find the CPU with your TCB. Use CPU xx and then the V command.
>
> Good luck.
>
>
> On Monday, February 13, 2017 8:10 AM, "Tony Harminc [hidden email] [hercules-390]" <[hidden email]> wrote:
>
>
>  
> On 13 February 2017 at 02:01, Binyamin Dissen [hidden email] wrote:
> > Alet 0 = primry, Alet 1 = secondary (hardware), Alet 2 = home (DUAL)
>
> Right. Just to emphasise your point, the magic ALET values 0 and 1 are
> hardware-defined, but the value 2 is implemented entirely in software
> by z/OS, and works exactly like any other ALET value. Other operating
> systems may or may not implement this shortcut.
>
> Back to the issue of the Hercules V command, there is no answer but to
> look at the code. Clearly there is room for improvement/enhancement.
>
> Tony H.
>
>
>
Reply | Threaded
Open this post in threaded view
|  
Report Content as Inappropriate

Re: V command translation error Clarification

Hercules390 - General mailing list
In reply to this post by Hercules390 - General mailing list
On 13 February 2017 at 18:27, Jon Perryman [hidden email] wrote:
> I think the op has a very basic problem and AR mode is not part of their skill set. AR
> mode is confusing even if you have some AR experience.

That may well be true, but you are not exactly clarifying things.

> E.g. AR's being confused with alet's. AR's are associated to each
> register. AR0 is always assumed to be ALET 0.
>
> The V command does not reference AR's (only the first 3 ALET's).

Well, it's not entirely clear what it does from the help, which is why
I raised the question:

>> HHC01603I Format: "v [P|S|H]addr[.len]" or "v [P|S|H]addr[-addr2]" to display
>> HHC01603I up to 64K of virtual storage, or "v [P|S|H]addr=value" to alter up to
>> HHC01603I 32 bytes of virtual storage, where 'value' is a string of up to 32
>> HHC01603I pairs of hex digits. The optional P, S or H address prefix character
>> HHC01603I forces Primary, Secondary or Home Space address translation mode
>> HHC01603I instead of using the current PSW mode, which is the default.
>
> So if the default is the current PSW mode, what does it do if that
> mode is AR? How does it choose an access register to use?

It's also not the case that it "references the first 3 ALETs". What it
says it does (though the help is clearly incomplete and perhaps also
wrong) is  use the translation mode selected by the command issuer, or
the default of the current PSW's translation mode. Of those
translation modes, only AR mode requires an ALET, and that's where we
came in.

Tony H.
Loading...